Xilinx will release fpga with 35 billion transistors next year

Xilinx has announced the UltraScale+ VU19P, a 16nm fpga made of 35 billion transistors. The bulky chip is intended for emulation and prototype testing.

The Virtex UltraScale+ VU19P from Xilinx has nine million system logic cells, the building blocks of an fpga, on board. In addition, 1.5 terabits per second of DDR4 memory bandwidth and 4.5Tbit/s of bandwidth is available via 80 GTH transceivers, and the chip has 2072 configurable I/Os. According to the manufacturer, the chip is 1.6 larger than its Virtex UltraScale 440, which the company produces at 20nm and which it advertises as “largest fpga” to date. Xilinx reports a footprint of 65x65mm for the chip. Despite the high number of transistors, the size is limited thanks to the use of 3D stacking, or the stacking of chip layers, as Xilinx uses with high-end FPGAs.

For comparison: the Volta GV100 GPU produced at 12nm from Nvidia’s Titan V has 21.1 billion transistors on an area of ​​815mm². Last week, the company Cerebras demonstrated a deep learning chip with a surface area of ​​46,225mm² that is made up of 1.2 trillion transistors, but that is a large mesh network of relatively simple cores.

The programmable VU19P chip allows hardware manufacturers to test their chip and soc designs before they go into production. For these emulation and prototype applications, manufacturers want the highest possible memory bandwidth and many I/Os, according to Xilinx. The manufacturer will deliver the chip from autumn 2020 along with debug tools and a development platform to design and validate chip technology.

Xilinx is the market leader in the FPGA market, according to Gartner, with a share of just over 50 percent. Intel, which acquired Altera in 2015, and Microchip, have market shares of 36 and 6.6 percent, respectively. EnterpriseAI publishes the market figures.

Update, Friday 15.25: Added footprint information.