Download KiCad 8.0.2

The second update for KiCad version 8.0.0 has been released. KiCad is a collection of open source programs that can be used to design electronic schematics and printed circuit board layouts. Furthermore, it can be a bill of materials, Gerberfiles and create a 3D representation of the PCB and its components. KiCad has an extensive library of components, including the symbol, footprint and 3D models. A Spicesimulator is also missing. Detailed information about the innovations in version 8.0 can be found here this page are being found; the changelog for this release looks like this:

General

• Correctly resolve variable ${CURRENT_DATE} in title block. #17256
• Correctly too thin over bar when exporting to PDF with non-default font. 17218
• Add environment variable for configuring stock data home path. #15687
• Fix a library tree pane search issues. #17205
• Fix rendering/plotting of arcs with tiny angle and huge radius. #17343
• Add autocomplete accept and cancel to the hotkeys list.
• Fix selected item count in the properties panel.
• Add newline to end of file. #17480
• Reduce the number of displayed digits for coordinate edit controls. #15539
• Fix Arial font drawing artifacts. #17621
• Add missing file icons. #17525
• Add libgit2 version 1.8.0 compatibility. #17536
• Fix crash in configure paths using non-ascii characters in column headers. #17743

Schematic Editor

• Allow the simulation DC operating point labels to be repositioned. #17228
• Show pin names in footprint viewer after assigned to symbol. #17349
• Always define default net class even when it doesn't exist. #17388
• Support importing Altium ASCII schematic files.
• Place items on root sheet when it's the only sheet when importing EasyEDA schematic.
• Support dot and clock symbol pin styles when importing EasyEDA schematic.
• Support multiple sheet schematics on EasyEDA import. #17219
• Fix broken paste special keep existing symbol annotations. #17231
• Do not update schematic connectivity for irrelevant property changes.
• Fix database library cache memory leak. #17435
• Do not tab focus on random symbol when cross probing. #17531
• Fix warning due to unused angle in EasyEDA Pro schematic parser.
• Do not open ERC dialog when clicking ERC marker. #17383
• Select correct ERC dialog entry when double clicking ERC marker. #17383
• Check for bus no-connects in ERC. #13285
• Maintain hierarchy navigator expansion state between edits. #16635
• Update hierarchy navigator when undoing or redoing sheet name changes. #17721
• Fix incremental connectivity issue. #17528
• Make nets with net class directives remember which net class they belong to. #17720
• Close file when written on BOM export. #17779
• Fix missing instance data when reusing an already loaded schematic.
• Fix crash on consecutive symbol changes with different pin counts. #17851

Spice Simulator

• Allow deletion of a user-defined signal. #17395
• Remove unsaved flag from title bar after saving simulation workbook.
• #17411 Use correct tooltip for tune resistor series buttons.
• #17515 Don't show hidden text in symbol previews.
• #17526 Close active cell editor when showing/hiding columns in symbol fields editor.
• #17425Add option to preserve custom power flag values ​​in “Update Symbols from Library” dialog

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• Symbol Editor Set description on Altium imported symbols.
• #16943Do not allow to selection of invisible pins and fields
• .Expose units and alternate body style to properties panel

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• Board Editor Run edge cuts and margin clearance tests on zone layers.
• #17292 Don't allow selection of hidden footprint text in board editor.
• #17271 Make Edit Track & Via Sizes dialog “specified sizes” dropdowns clearer.
• #17216 Remove netclass/custom rule handling from Track & Via Properties.
• #17216 Don't flag blind via's on different layers as “Drilled holes too close together” by DRC.
• #17426 Allow specifying a minimum for a via count constraint.
• #17234Fix crash in EasyEDA importer when Name/Prefix type text is not in a footprint
• . Fix position and orientation of footprint graphics on Fabmaster (CADENCE ASCII) import.
• #17239Fix zone cross-probing from DRC dialog
• . Fix crash when importing Altium PcbDoc.
• #17351 Fix Eagle board import when footprint library versions exist.
• #12897 Improve performance when toggling view of rats nest lines assigned to net classes.
• #17115 Correctly handle locked table cells.
• #17439 Fix when swapping layers.
• #17371 Fix issue for boards with round outline on STEP export.
• #17446 Handle small segments connecting two arcs better.
• #17499 Correctly translate Chinese characters in gerber file output.
• #17534 Fix clearance violation between a filled zone and a net tie polygon.
• #17223Add toggle horizontal, vertical, 45 degree mode entry to the measure tool's context menu
• . Fix performance issue when editing length tuning on net inspector highlighted net.
• #17068 Fix excessive hang after a move and undo. #17420 and
• #17561 Sort netnames in properties panel.
• #15590 Fix zone fill pad connection issues.
• #17559 Expose groups to property manager.
• #17496 limiting text height and width to 1 mil.
• #17543 Fix stack overflow when running DRC.
• #17560 Fix ghost footprint reference after moving then undoing.
• #17592 Improve DRC performance due to user interface yields.
• #17434 Do not how negative track length after deleting length tuned track in net inspector.
• #17527 Fix slow selection time when calculating clearance.
• #17327 Fix freeze when selecting two zones on the same layer with different nets.
• #17327 Fix race condition in zone fill.
• #17180 Avoid crashing on missing tracks when importing from CADSTAR.
• #17523 Prevent PNS router from creating tracks with clearance violations.
• #16879 Do not violate DRC rules when dragging via.
• #16293Add corrections to IPC2581 export syntax
• . Update footprint field when changing footprints.
• #17598 Fix crash when opening board.
• #17664 Prevent tracks from disappearing on move.
• #17110 Fix crash when box selection contains a via and a rule area.
• #17687 Do not drop segments when rerouting existing track and “remove redundant track” is set.
• #17582 Fix reversed text in flipped footprints.
• #17546 Fix hang after moving footprint.
• #17763 Do not fail when cannot construct a wire on STEP export.
• #17774 Fix misaligned solder mask for chamfered pads in gerber output.
• #17793 Fix zone fill crash with custom design rule with courtyard condition.

#17791

• Footprint Editor Fix importing EasyEDA footprints.
• #17264Report location of future format errors when reading footprints
• . Fix crash when pressing a number key.

#17522

• 3D Viewer Improve STEP model import precision.
• #17168Fix graphic issues with zero thickness copper
• . Allow setting colors not in board stackup when the board stackup option is set.
• #17632 Fix cryptic error message “input line too long” when importing 3D model fails.

#17727

• GerberViewer Show “Edit Grids…​” menu entry.

#17372

• Python scripting Fix SWIG wrapper or PAD AddPrimitive() method.

#17676

• Command Line Interface Add missing text variable override when plotting gerbers.
• #17283 Fix crash when processing schematic that references title block variables.

#17790

• WindowsChange the platform detection order
• . Accept hotkey using Alt key modifier.

#17453

• macOS Fix crash when toggling display of 3D models from off to on in 3D viewer.
• #17198 Fix crash on start up.

#17749

• Linux Fix background color opacity with KDE plasma desktop.
• #17341 Disable infinite panning when using XWayland.

GPL