Soft Machines presents VISC processor

The Californian newcomer to the processor field Soft Machines is launching its first VISC processor. In addition to the VISC CPU named Shasta, the company also showed a scalable soc Mojave. Both products should be launched in 2016.

The soc and cpu were presented on Wednesday at the Linley Processor conference. The VISC CPUs are built around ‘virtual cores’ and ‘virtual hardware threads’. A middleware layer translates the operating system applications into VISC’s own instruction set. The tasks are then further distributed over the virtual cores of the CPU, with the special feature that it can also distribute heavy single threaded tasks on a virtual core over different hardware cores.

The 64-bit chip is baked at 16nm and runs at 2GHz with 1MB L2 cache per core. The virtual software layer can translate different instruction sets, such as x86 and ARM. But the CPU can also be addressed with native VISC code, which is even more efficient.

At the launch of VISC in October 2014, the company’s CEO Mahesh Lingareddy stated that he believes “VISC is ushering in a third wave of computer architecture.” The company has been around for more than eight years. It only came out last year when it had a working prototype VISC CPU; it ran at 500MHz. The VISC architecture should be able to get three to four times more instructions per cycle, so performance per watt should be two to four times higher in both single and multithreaded processes.

Soft Machines did not develop the processors alone. Among the investors in the company are AMD and Samsung Ventures, for example. The company has already secured more than $175 million in investments.