SK Hynix investigates combining dram with soc for ddr6

SK Hynix is ​​considering integrating the dram into a soc design for the development of ddr6. The development of the ddr5 successor should take place in five or six years. First comes ddr5, whose mass production will begin in 2020.

Dram researcher Kim Dong-kyun mentions combining dram with a soc in an interview with The Korea Herald. It is one of the concepts for the ‘post ddr5’ era that the memory manufacturer is considering. Another option is to simply make ddr6 faster than ddr5.

The researcher does not provide concrete details about the possible integration of dram in a soc. Removing the physical distance between the memory and the CPU can improve speed. The plans for ddr6 are at an early stage. The actual development will take place in five or six years’ time, the researcher says. According to Kim Dong-kyun, SK Hynix has spent about two years researching new technology for ddr5.

In November last year, the manufacturer presented the first DDR5 memory chip. DDR5 should be faster and more fuel efficient than ddr4, and it is expected to hit the market in 2020, when mass production begins. Initially, ddr5 will have a throughput of a maximum of 5200MT/s, but in 2022 this should be increased to 6400MT/s.