Scientists can scan chips in detail in 3D with new technology

Scientists have applied a new method to scan entire chips for defects or manipulation, for example. By means of special X-ray scans, 3D images can be made that can be zoomed in to the transistor level.

Researchers from the Swiss Paul Scherrer Institute and the American Viterbi School of Engineering at the University of Southern California have developed a system based on ptychographic X-ray laminography, or PyXL, to scan entire chips. In combination with algorithms to reconstruct data, a 3D dataset can thus be built up.

The method makes it possible to capture high-resolution 3D flat surfaces without having to prepare samples of those surfaces first. In addition, the system allows you to zoom in on details of the surfaces. Previously, different techniques were required for this and parts of the chip surfaces had to be peeled off in order to scan details.

In the first PyXL test, the scientists scanned a 16nm finfet chip with a small part of a chip attached to it. ‘A short time’ after the surfaces had been recorded, a 3D data set was available and it can be seen that this provides insight into all chip layers and interconnects at nanometer level. The chip had an area of ​​300×300µm and the system zoomed in on the 40µm diameter part for a measurement with a resolution of 18.9nm.

According to the researchers, the method can be used for chip verification, among other things. Chip manufacturers and other parties can use it to check chips without the chips having to be physically destroyed. This way they can guarantee that the chips have been produced according to specification, without errors and that they have not been tampered with.

Mirko Holler (left) and Michal Odstrcil (right) from the Paul Scherrer Institute for the ptychographic X-ray laminography system

In ptychographic X-ray laminography, the researchers combine several techniques. They previously conducted tests with ptychographic X-ray computed tomography, or PXCT. Here, samples are irradiated from all sides with X-rays, after which reconstruction algorithms can calculate images based on diffraction patterns. They already managed to map parts of a 22nm chip from Intel, but the disadvantage is that parts of the chip had to be broken off in order to be able to shine the samples from all sides.

This disadvantage was overcome by combining that technique with laminography. This technique is especially for flat surfaces that are slightly tilted for this and then rotated for the CT scans. In this way the surfaces can be fixed at different angles of rotation.

The researchers describe their method in an article in the scientific journal Nature Electronics under the title Three-dimensional imaging of integrated circuits with macro- to nanoscale zoom.

Artistic render of the 3d rendering of the Paul Scherrer Institute system.