Rumor: AMD EPYC Venice gets up to sixteen memory channels and new SP7 socket

AMD’s sixth-generation EPYC server processors may get a new SP7 socket. This is reported by YuuKi_AnS, who often shares information about unannounced processors. The CPUs use the Zen 6 architecture and may have up to sixteen memory channels.

AMD releases two variants of the sixth generation EPYC CPUs, reports @Yuuki_AnS. The CPUs, codenamed Venice, will be available with twelve or sixteen memory channels, according to the leaker. The current EPYC Genoa processors have a maximum of twelve such channels. According to the leaker, the EPYC Venice processors also use a new socket: SP7. This will be the successor to SP5, which is currently used for AMD’s fourth generation EPYC Genoa CPUs.

Before the sixth EPYC generation is released, AMD will release a fifth generation of EPYC Turin CPUs based on the Zen 5 architecture. These will again receive the SP5 socket that is currently used for EPYC Genoa, AMD previously confirmed. Turin will be released sometime next year, although there is no concrete release date yet. Venice may follow in 2025 or later, writes VideoCardz. AMD itself has not yet shared any official details about EPYC Venice.