Renesas Introduces RZ/Five Microprocessor with 64-bit RISC-V Core

Japanese chipmaker Renesas has announced a new RZ/Five microprocessor with a 64-bit RISC-V core. It will be available alongside the existing Arm variants. The chips are intended for industrial use, for example in iot endpoints.

Renesas writes that the new RZ/Five chip is based on a single AX45MP core from Andes, which offers 64bit support and runs at a clock speed of up to 1GHz. The chip also has support for Gigabit Ethernet and USB 2.0. Renesas provides the RZ/Five with two CAN-FD channels with which sensor data can be sent. The chip has two analog-to-digital converters, a host interface for SD card readers and an audio interface. There is support for up to 4GB DDR4-1600 or DDR3L-1333 memory with inline ECC. The chip has no display interface and thus cannot display images.

The manufacturer also comes with a complete soc based on the RZ/Five-mpu. According to the manufacturer, the chip is suitable for use in iot endpoints, which are used to collect sensor data and can connect to servers or cloud services. Renesas says the chips can be used in gateways, for example, for security systems or inverters for solar panels. The manufacturer further writes that the RZ/Five will receive “more than ten years” Linux support.

Renesas says the new RISC-V option complements its existing portfolio of Arm MPUs for industrial use. For example, the Japanese company writes that the RZ/Five with a 13mm bga package is pin-compatible with the company’s earlier RZ/G2UL-Arm chip. Renesas also comes with a more compact and less complex 11mm variant. The RZ/Five mpus will be available as samples starting this week and mass production will begin in July.

RISC-V is an open source instruction set architecture. This means that anyone can use this isa as they wish to develop chips. In addition, users can adapt or extend the RISC-V-isa based on the required functions. Renesas previously released a microprocessor with a 32-bit RISC-V core.