PCI-Sig Releases PCI-E 4.0 Specification
The PCI-Sig organization has released version 1.0 of the PCI-e 4.0 specification. Compared to PCI-e 3.0, the specification doubles the bandwidth per lane to 16GT/s. The organization already has pci-e 5.0 in the works.
PCI-Sig, the organization that oversees the development of the PCI standard, announces the release of the final version of the PCI-e 4.0 specification. The specification describes the architecture, interconnect properties, and programming interface for the standard. This allows manufacturers to start manufacturing PCI-e-4.0 products.
Members of the PCI-Sig are already producing chips and controllers based on the specification, according to the organization. In June, it already announced that the then published version 0.9 feature was complete. Doubling the bandwidth per lane from 8GT/s to 16GT/s, increases the total bi-directional bandwidth to approximately 64GB/s. Pci-e 4.0 also provides reduced latency, improved ras capabilities, scalability, and improved I/O virtualization. Products based on the standard are possible as early as this year, but can certainly be expected in 2018.
PCI-e 5.0 will then be released in 2019, with a doubling of the transfer rate to 32GT/s. The aim of the PCI-Sig is to have the specification ready in the second quarter of 2019.
| 1.0 | 8b/10b | 2.5GT/s | 250MB/s | 1GB/s | 2GB/s | 4GB/s |
| 2.0 | 8b/10b | 5GT/s | 500MB/s | 2GB/s | 4GB/s | 8GB/s |
| 3.0 | 128b/130b | 8GT/s | 984.6MB/s | 3.94GB/s | 7.9GB/s | 15.8GB/s |
| 4.0 (expected in 2018) | 128b/130b | 16GT/s | 1969MB/s | 7.9GB/s | 15.8GB/s | 31.5GB/s |
| 5.0 (expected in 2019) | 128b/130b | 32GT/s | 3938MB/s | 15.8GB/s | 31.5GB/s | 63.0GB/s |