Jedec publishes HBM3 standard with maximum bandwidth of 819GB/s

Jedec has published the JESD238 HBM3 standard, memory that is used in graphics cards, among other things. The new standard has a higher maximum bandwidth than predecessor HBM2E, which is because the per-pin data rate has been doubled.

The HBM3 standard has a per-pin data rate of 6.4Gbit/s, making the maximum bandwidth per memory module 819GB/s, reports Jedec. In addition, the number of independent channels has been doubled to 16. Because each channel can consist of two pseudo channels, HBM3 supports 32 virtual channels, says the standard maker.

The new memory standard supports 4-high, 8-high and 12-high-tsv stacks, with the option to support 16-high-tsv stacks in the future. Tsv stands for through-silicon via and connects memory layers with each other, where the number indicates how many memory layers a module consists of. In an 8Gbit-4-high setup, so there are four 8Gbit memory layers, a single module can have 4GB of memory. HBM3 therefore theoretically supports a maximum of 64GB, in a 32Gbit-16-high setup. In a 32Gbit-12-high setup, the current maximum, an HBM3 module can consist of a maximum of 48GB of memory. Jedec expects the first HBM3 devices to use 16Gbit memory layers.

HBM3 also has on-die-error-correction code to increase reliability and availability. In addition, the new standard uses a lower voltage of 1.1V, which would make the memory more efficient.

Micron, SK hynix and Synopsys, among others, say they want to use HBM3. SK hynix already announced its first HBM3 memory last October and then said it would come with modules of 24GB and 16GB. It is not known when the new memory should appear. AMD previously used HBM memory for its Radeon R9 Fury and Vega cards, but only uses GDDR6 memory on the Radeon RX 6000 cards. Nvidia uses the HBM memory for its high performance computing cards, such as the A100 accelerator.