Intel’s Knights Landing Xeon Phi CPU gets 60 cores

Intel has released more information about the upcoming Knights Landing Xeon Phi processor. The server CPU will have at least sixty cores and more than eight billion transistors. Under Linux, the CPU can handle 240 threads simultaneously.

The Knights Landing version of the Xeon Phi CPU is one of the largest chips Intel has ever made: according to the website The Platform, the surface of the die is about the size of a credit card. The sixty cores in the processor are based on a modified Silvermont Atom chip design. However, Intel has disabled the so-called TSX transactional memory feature because a flaw has been discovered in this mechanism in the Xeon E5 2600 CPU.

Intel first allows the sixty cores to communicate with so-called near memory. In a test setup, 16GB of this extra fast mcdram ram could be seen. This memory type was developed by Intel together with Micron Technology and could achieve speeds of up to 400GB/s. Furthermore, the chip design contains six lanes to communicate with regular DDR4 memory, called far memory by Intel. Knights Landing can handle up to 384GB of far memory at a speed of 90GB/s. Furthermore, the design has 36 PCI-e 3.0 lanes.

The chip manufacturer did not want to confirm the rumors that the Knights Landing chip design can contain a maximum of 72 cores, partly because the yields of the complex 14nm chips may be too low and some cores have to be disabled. Also, Intel does not mention clock speeds. The company does give an indication of the performance: the Knights Landing CPU could deliver more than 3 teraflops in floating point calculations. Furthermore, Intel would also release a version of the cpu that can serve as a co-processor and an implementation that has OmniPath interfaces that are good for 100GB/s.