Intel releases Stratix fpgas with hbm2

Intel has announced the Stratix 10 MX. This fpga is equipped with high bandwidth memory 2 and the high memory bandwidth should make the accelerator suitable for use in supercomputers and data center applications.

According to Intel, memory bandwidth is increasingly a bottleneck for companies due to the trend to process large amounts of data faster; the integration of hbm2 with the Stratix 10 MX should be an answer to this. The field programmable gate array can, among other things, quickly compress and decompress large amounts of data and read, write, encrypt and decrypt data simultaneously, without straining the CPU.

The Stratix 10 MX is a 14nm system-in-package with two hbm2 memory stacks, both of which have 16 64-bit channels, each with a memory bandwidth of 16GB/s. In total, the fpga offers a memory bandwidth of 512GB/s. The chip’s monolithic core is based on Intel’s HyperFlex architecture and runs at 1GHz.

The core communicates with the memory via Intel’s new embedded multi-die interconnect bridge. This interconnect enables the company to connect chip components on a substrate, even if they are not produced on the same production process.

According to Intel, the use of hbm2 provides savings in terms of consumption compared to other drams. To achieve a memory bandwidth of 128GB/s with ddr4, about five dimms would be required for a total consumption of 22W. The Stratix 10 MX would allow comparable bandwidth with half the consumption.

Intel supplies several variants of the Stratix 10 MX. For example, there will be variants with integrated transceivers and models with an ARM-soc with four Cortex A53 cores at 1.5GHz that are integrated on the fpga. The chip giant sees FPGAs as a growth market and took over Altera for it in 2015.