Intel accelerates core-to-core communication hardware

Researchers from Intel and North Carolina State University have improved the performance of core-to-core communications on a multicore by a factor of 12 by having coordination handled through a hardware component.

Core-to-core communication traditionally works through shared memory, but this limits performance when handling shared workloads in a multicore system, especially as the number of cores increases. The cause lies in the queuing of the threads: this is done via software, which causes overhead caused by coherence invalidations and cache misses.

Scientists from Intel and North Carolina State University have analyzed the behavior and overhead of software queue management and used their findings to create an alternative way to manage communication between compute cores.

They propose to use a hardware component that is optimized for this, the so-called Queue Management Device. This can be added to a network-on-a-chip and enabled by the C2C Communication Acceleration Framework or CAF to take care of the coordination of the threads and offload both cores and memory. CAF also contains software optimizations that can reduce overhead and improve performance by a factor of two to a maximum of twelve.

The researchers present details about the methodology in the publication of their paper titled CAF: Core to Core Communication Acceleration Framework. That presentation will take place on September 11 at the annual Conference on Parallel Architectures and Compilation Techniques in Israel.