IBM spotlights 65nm Cell chip for servers

IBM has announced a server chip based on the Cell architecture. The Powerxcell 8i processor will be part of a supercomputer that will break the speed barrier of 1 petaflops for the first time.

The Powerxcell 8i CPU is produced on a 65nm process, but broadly retains the architecture and 3.2GHz of the original 90nm Cell processor in the Playstation 3. The smaller process has reduced energy consumption, resulting in two Powerxcell 8i chips can be placed on a blade without exceeding the maximum of 250W – the prescribed maximum for IBM Bladecenter servers.

IBM has according to EE Times made two changes to the Cell design. First, support for DDR2 memory has been added, which replaces the Rambus xDR memory found in the original Cell processor. IBM has also added support for double-precision floating-point arithmetic to the Powerxcell 8i chip. The server chip can address 32GB of memory.

One of the first customers is already known: the Los Alamos National Laboratory. This institute will equip its Road Runner supercomputer with a combination of Powerxcell 8i CPUs and dual-core Opterons. Together, these should be able to provide a continuous computing power of 1 petaflops. The Road Runner will therefore most likely earn a place in the next Top 500 list of supercomputers, which will be published in June of this year.

IBM will also sell the Powerxcell 8i blades separately for placement in servers.