Details on Intel’s Haswell Server Platform Announced
The first details about Intel’s next-generation Xeon processors and associated server platform have been revealed. The Haswell EP platform would use DDR4 memory and the CPUs would have fourteen cores.
The first slides around the Haswell EP platform were published on the Chinese site ChipHell. The Haswell processors for the server platform, like the consumer versions, would be produced at 22nm, but would have a new architecture. The Xeons would have up to fourteen cores on board, which are connected to each other via a ring architecture and with a maximum of 35MB L3 cache. Also the System Agent, the pci express controller and the qpi logic are connected to it, as is the ddr4 memory controller. That controller can control four memory channels, to which one DDR4 memory module is connected.
The switch from ddr3 to ddr4 would not only make the memory faster, with a maximum speed of 2133MHz, but also work with lower voltages. The PCI Express controller provides 40 lanes for the EP processors and 24 for the simpler EN series. On platforms with more than one processor, the CPUs will be connected via qpi and one of the processors will communicate with the chipset via a dmi link.
The chipset, called Wellsburg, is given the type number C610 and functions as a platform controller hub or PC. Most of the I/O connections will run via this chip, which will probably be produced at 32nm. The smaller process node would lower the chipset’s tdp to just 7W; the tdps of the Haswell processors would be between 130 and 160W. Remarkable is the phasing out of a gigabit network interface in the chipset. According to Intel, by the release of the platform around 2013-2014, faster network technology such as 10Gbps or Infiniband connections will become the norm.
The chipset would of course shift the focus of SATA and USB connections from SATA-300 and USB 2.0 interfaces to SATA-600 and USB 3.0 ports, respectively. The C610 chipset would get ten SATA-600 ports, six USB 3.0 and eight USB 2.0 ports. Only entry-level boards would still be equipped with a gigabit network interface.