ARM DynamIQ succeeds big.Little for processor core configuration in socs

The British processor architecture maker ARM has presented DynamIQ, a technique that big.Little must follow for the configuration of processor cores in socs. It allows for more clusters and cores based on multiple microarchitectures in the same cluster.

It seems that with DynamIQ it should be possible to combine, for example, Cortex A73 processor cores with A53 cores in the same cluster, something that is not yet possible. The cores in the same cluster may differ in clock speed and battery demands. In addition, there can now be eight processor cores in a cluster and a soc can have an infinite number of clusters.

In addition, DynamIQ contains techniques to enable a better battery life, for example by allowing processor cores to switch faster between a high and low clock speed. There is also more fine-grained control over the clock speed. According to ARM, this is important for applications in virtual reality, where the frame rates must remain the same while the heat development must also be under control.

ARM focuses DynamIQ on applications such as virtual reality, artificial intelligence and self-driving cars, but the technology can also be used in more traditional applications such as smartphones and tablets. ARM says socs based on DynamIQ could be available this year. Current socs still work with a big.Little layout, a technique that ARM presented in 2011.