AMD plans to release a server chip with 12 cores in 2010

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AMD is going to drastically increase the number of cores in its server processors from the four that the Barcelona currently contains to twelve in the ‘Magny-Cours’ that is due to appear in 2010.

The released new server roadmap from AMD shows even more news. Randy Allen, head of AMD’s server and workstation division, announced the new roadmap on May 7 during a conference call. Up to and including 2008, there have been no major changes in the existing plan. For example, AMD’s first 45nm quad-core Shanghai processor will be released at the end of 2008. It will be interesting in 2009. The planned eight-core ‘Montreal’ chip, consisting of two Shangai quadcores forged together, has disappeared from the list of server chips, while the Istanbul with six cores and 6MB L3 cache has been added. In the second half of 2009 this has to compete against Intel’s six-fold Dunnington.

The really big one amendments coming in the first half of 2010. Not only will the Sao Paulo, an improved version of the Istanbul with six cores, appear then, but we will also see the Magny-Cours take the stage with twelve cores and 12MB of L3 cache. The latter model consists of two Sao Paulo dies on one processor. The Magny-Cours and the Sao Paulo have four Hypertransport 3.0 links, versus three in the Barcelona, ​​Shanghai and Istanbul. In addition, the two are equipped with a ‘probe filter’, which reduces the traffic between the caches of the processor cores is needed to maintain cache coherency. It is unknown how much L2 cache the cores are provided with. The Magny-Cours and Sao Paulo use ddr3 memory.

In addition, AMD’s blueprint shows that the company is swapping Nvidia’s server chipsets for its own models, and that the Magny-Cours and the Sao Paulo use a new processor socket code-named “Maranello,” formerly known as “Piranha.” In 2010, AMD’s server chips will face Intel’s 35nm Westmere processor and perhaps the Larrabee with an unknown amount of cores. It is unknown when AMD will introduce the Bulldozer core in its server or desktop chips.

Update: It seems that yesterday’s news about the Hydra eight-core server chip with the announcement of the new roadmap has turned out to be incorrect.

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