Intel to make processors with various production processes

Intel will divide processors into parts that are manufactured using different production processes. Processors can thus consist of 10nm, 14nm and 22nm parts. In addition, Intel has announced a new low-power 22nm node.

Intel gave details about existing and upcoming technologies it uses in chip manufacturing at Technology and Manufacturing Day in San Francisco. Among other things, the company announced that it will adopt heterogeneous mix and match designs in processor manufacturing rather than monolithic designs. For example, the cpu and gpu are produced at 10nm, while the input/output as pcie and memory controllers and other parts are produced at 14nm. The ability to combine parts in this way is made possible by Intel’s emib technology, or embedded multi-die interconnect bridge, that efficiently connects parts together.

Unlike a large silicon interposer, emib technology uses small interposers that only provide communication between the different dies: power is provided through more traditional metal layers. This reduces the cost of the interposer and simplifies the design, while also enabling larger chips. The advantage of the heterogeneous designs is that the entire complex processor does not have to be transferred to a new node generation, which can positively influence the yield of well-functioning chips and entail less R&D costs. The first chip where Intel applies this is the Stratix 10-fpga.

Additionally, Intel announced that the platform controller hub, the equivalent of the chipset, will be produced at 14nm instead of 22nm from the first half of 2018, which should make Intel’s platform more economical. Sometime in that year, the manufacturing of networking chips on 14nm will also start, while the production of modems will switch to that 14nm node at the end of this year.

Intel also announced a new 22nm generation: 22FFL, an energy-efficient node for iot and mobile applications. Intel has refined its 22nm and, among other things, reduced the leakage currents by a factor of a hundred. In doing so, the company has used knowledge of its 14nm node and in terms of the size of the features, 22FL is therefore between Intel’s 22nm and 14nm node. Intel is moving forward as a custom foundry for production for third parties and sees particular applications for internet-of-things products and mobile chips for the 22FFL node. In terms of cost, the node could compete with 28nm and 22nm nodes.

Furthermore, Intel proposes a new way to base the naming of nodes. Intel senior fellow, Mark Bohr notes that not all chip makers are still sticking to the 0.7x linear scaling for key features when transitioning to a new node, which has led to a “mess” in naming. Intel therefore proposes to use a new formula to arrive at the number of transistors per square mm:

The manufacturer notes that the surface of SRAM cells has not been taken into account. Intel suggests listing these separately. When using the formula with its 10nm node, the chip giant still claims to have an advantage over the nodes of the same name from competitors such as TSMC and Samsung. According to Intel, there is still enough stretch in Moore’s Law for the foreseeable future and the company even claims to be able to scale better. For 10nm production, Intel uses self-aligned quad patterning. Quad-patterning leads to higher costs, but the higher yields and reduction of the interconnect pitch through the use of the self-aligned technique should compensate for this.

Intel will use 10nm production for its Cannonlake processors, the first chips for laptops of which should appear later this year. The company mentioned a chip area of ​​7.6mm2, where a comparable 14nm chip would take up 17.7mm2. Never before would the company have achieved a reduction factor of 0.43x. A refresh of the 10nm node, which Intel already calls 10++, would provide further performance and consumption improvements.