Intel introduces 32nm Xeons with six cores

Intel has released its first Xeon server chips produced at 32nm. The Xeon 5600 series consists of fifteen relatively economical models with four or six cores, while the amount of cache on all processors is 12 megabytes.

The Xeon 5600, also known as the Westmere EP, consists of 1.17 billion transistors and has a size of 240 square millimeters. The Westmere architecture means support for technologies such as Turbo Boost and HyperThreading. The Xeon 5600 processors are the successors to the 5500 models, which had two or four cores, were produced at 45nm and could have 4 to 8MB of L2 cache.

The switch to a smaller production process ensures that consumption has barely increased and that there is room for 12 MB L2 cache and models with six cores. The TDP of the slowest model, the Xeon L5618, is 40W, while the most powerful model, the X5680, has a TDP of 130W.

Consumption has also been kept within limits because the L3 cache and memory controllers now have their own energy supply. The memory controllers support DDR3 memory with a voltage of 1.35V, which is lower than the standard 1.5V. Incidentally, nine dimms are still supported per CPU.

The chips contain new instructions for encrypting and decrypting AES encryption, while hardware support for Intel’s Trusted Execution Technology is also new. This makes it possible to secure virtualized servers and, for example, to prevent the injection of malware during boot before a hypervisor has loaded.

In addition to twelve ‘normal’ models, the new Xeon line consists of three embedded processors. It concerns a hexacore, the Xeon E5645 and L5638, and two quadcores, the Xeon L5618 and E5620. The Westmere EP CPUs will be joined by the Westmere EX models, or Xeon 7500 chips, at the end of this month. By then, the Xeon 5600 line will also have to compete with AMD’s Opteron 6100 processors, codenamed Magny Cours.

TypeClock SpeedCores/ThreadsL3 CacheTdpPrice in USD

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